問題一覧
1
Doubled
2
Absolute potential
3
625 W
4
inversely proportional to the branch resistance values
5
zero
6
three-terminal
7
0.25N
8
3600 C
9
concentric circles
10
difference in potential between 2 points
11
increase the reluctance
12
There is no effect
13
has to be increased
14
very small as compared to speed of light
15
0.34 Ω-m
16
Both A and R are true and R is correct explanation of A
17
transistor is faulty
18
CMRR is zero
19
Decreases the slew rate of op-amp
20
636 Hz
21
0.482
22
4.3V
23
1 mA
24
Hartley
25
320 Ω, 15 mA
26
2.5%
27
0.93 mA
28
low power consumption
29
Both A and R are true and R is correct explanation of A
30
increases
31
1
32
900 sin² 337 t
33
Zero
34
Linearity
35
15.79 V
36
400 mA
37
17 k-ohms
38
3.2 k
39
the resistor value did not change
40
35 W
41
none of the above
42
4
43
diffusion
44
all of the above
45
hold the circuit stable at the designed Q-point
46
is a voltage-controlled device
47
high input impedance
48
depletion
49
30 μC and 60 μC respectively
50
four times
51
PUT
52
UCSZ0
53
Virtual relay contacts and coils
54
Address bus, data bus, control bus
55
Byte is assigned an I/O address.
56
Coincide with the poles
57
Xc = R at the cutoff frequency.
58
using Boolean algebra
59
the way we OR or AND two variables is unimportant because the result is the same
60
Gate, anode 1, and anode 2.
61
3 terminal, self-controlled device
62
As a system parameter is changed.
63
4 to 16 lines
64
No oscillation
65
8
66
DRAM - Dynamic Random-Access Memory.
67
mount directly
68
Zero to 0.8 volts.
69
gate, anode, cathode
70
7400 has four two-input NAND gates; 7411 has three three-input AND gates
71
PSW
72
programmable interval timer
73
The interrupt that is more priority in the interrupt vector table will be served first.
74
Requirement of system recalibration from time to time
75
-2
76
All of the mentioned
77
isolation transformer
78
A high-logic state.
79
12.0 V
80
No change
81
0.65
82
Ex-OR gate
83
falls below the latching current
84
CPU, RAM, I/O ports, and timers
85
the diode should be replaced by a diac
86
High level.
87
an integrator circuit
88
p-i-n photoreceiver
89
negative pulse to the anode gate, positive pulse to the cathode gate
90
p+ n+ diode with p+ electrodes
91
both line and natural commutation
92
multiple, multiple
93
To generate a direct current
94
Pi-L network
95
Propagation delay
96
SUS
97
Assembler
98
Numerical controlled machines
99
CPU off
100
a diode in anti-parallel with the SCR
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Math2
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Loloysan · 100問 · 1年前est_ME1 & ME2
est_ME1 & ME2
100問 • 1年前問題一覧
1
Doubled
2
Absolute potential
3
625 W
4
inversely proportional to the branch resistance values
5
zero
6
three-terminal
7
0.25N
8
3600 C
9
concentric circles
10
difference in potential between 2 points
11
increase the reluctance
12
There is no effect
13
has to be increased
14
very small as compared to speed of light
15
0.34 Ω-m
16
Both A and R are true and R is correct explanation of A
17
transistor is faulty
18
CMRR is zero
19
Decreases the slew rate of op-amp
20
636 Hz
21
0.482
22
4.3V
23
1 mA
24
Hartley
25
320 Ω, 15 mA
26
2.5%
27
0.93 mA
28
low power consumption
29
Both A and R are true and R is correct explanation of A
30
increases
31
1
32
900 sin² 337 t
33
Zero
34
Linearity
35
15.79 V
36
400 mA
37
17 k-ohms
38
3.2 k
39
the resistor value did not change
40
35 W
41
none of the above
42
4
43
diffusion
44
all of the above
45
hold the circuit stable at the designed Q-point
46
is a voltage-controlled device
47
high input impedance
48
depletion
49
30 μC and 60 μC respectively
50
four times
51
PUT
52
UCSZ0
53
Virtual relay contacts and coils
54
Address bus, data bus, control bus
55
Byte is assigned an I/O address.
56
Coincide with the poles
57
Xc = R at the cutoff frequency.
58
using Boolean algebra
59
the way we OR or AND two variables is unimportant because the result is the same
60
Gate, anode 1, and anode 2.
61
3 terminal, self-controlled device
62
As a system parameter is changed.
63
4 to 16 lines
64
No oscillation
65
8
66
DRAM - Dynamic Random-Access Memory.
67
mount directly
68
Zero to 0.8 volts.
69
gate, anode, cathode
70
7400 has four two-input NAND gates; 7411 has three three-input AND gates
71
PSW
72
programmable interval timer
73
The interrupt that is more priority in the interrupt vector table will be served first.
74
Requirement of system recalibration from time to time
75
-2
76
All of the mentioned
77
isolation transformer
78
A high-logic state.
79
12.0 V
80
No change
81
0.65
82
Ex-OR gate
83
falls below the latching current
84
CPU, RAM, I/O ports, and timers
85
the diode should be replaced by a diac
86
High level.
87
an integrator circuit
88
p-i-n photoreceiver
89
negative pulse to the anode gate, positive pulse to the cathode gate
90
p+ n+ diode with p+ electrodes
91
both line and natural commutation
92
multiple, multiple
93
To generate a direct current
94
Pi-L network
95
Propagation delay
96
SUS
97
Assembler
98
Numerical controlled machines
99
CPU off
100
a diode in anti-parallel with the SCR